Wang 2200 CPUs and Models

Wang produced a number of computers with the 2200 name over the course of twenty years or so. What was it that these machines had in common that they formed a family? The answer is almost 100% upward software compatibility and to a lesser degree, I/O peripheral compatibility.

A source of confusion is that Wang made a number of CPUs and peripherals; they mixed and matched them and gave the systems names. Because of the building block approach, it was also possible to upgrade from one system to another. This page hopes to clarify that somewhat; mostly it was done for my own benefit since it wasn't clear to me either.

If you have any information on the Wang 2200 family (manuals, schematics, sales literature, etc.), or you worked at Wang at the time, or you have any revisions to my reconstructed history below, please get in contact with me.

Here is an outline of the information on this page:

• CPUs
  • Prehistory
    • 800
  • 1st Generation 2200 CPU
    • 2200 A/B/C
    • 2200 S/T
    • 2200 E/F
  • 2nd Generation 2200 CPU
    • 2200 VP
    • 2200 MVP
    • 2200 Micro VP
  • 3rd Generation 2200 "CPU"
    • 2200 CS/386
• Computer Systems
  • 2200 A/B/C/S/T
  • 2200 WCS/10, WCS/20, WCS/30
  • 2200 PCS
  • 2200 WS
  • 2200 PCS-II
  • 2200 VP family
  • 2200 CS
  • 2200 CS/386
• Game Over
• Postscript
  • Faastcom Computers

CPUs

Although there was excellent upward software compatibility through the various incarnations of the 2200 CPUs, there were in fact three radically different CPU implementations. The fact that there was no "assembly language" exposed by Wang to the public made it possible to make this switcheroo without affecting BASIC/BASIC-2 compatibility. With the extensive history of the family line and my distance from the real history, it is impossible to accurately detail everything without spending a year researching and writing a book. Below is a modest attempt to lay out some of the important details.

Wang 2200 Prehistory

By the mid 1960's, Wang started making a name for itself in the electronic calculator business. The LOCI-2 machine lead the way, with the 300 series and the 700 series being the blockbuster families. The 700 microarchitecture was originally intended to be for a programmable CPU, but external events caused Wang to convert that design team to build a high end programmable calculator instead.

The next attempt at a CPU was internally called the 800 CPU, and some of the old documents reference it, but it ultimately became known as the 2200 CPU.

First Generation 2200 CPU

CPU Model	Introduction	Comments
2200 A/B	May, 19731	CPU and separate power supply
2200 C	November, 19742	More microcode features
2200 S/T	January, 19753	Integrated power supply; more microcode; cornerstone of WCS family
2200 E/F	January, 19764	CPU integrated into terminal housing of the PCS computer

The 2200 project was started in 1970, with Bob Kolk as the project lead. One of the interesting features of the 2200 family was that the CPU wasn't a microprocessor, as the design was begun in 1970 and the first 2200 CPU shipped in April, 1973, predating the introduction of the Intel 8080 (April 1974) and similar micros. Instead the BASIC interpreter was a microcoded affair. No machine language was exposed to the user; although this can be viewed as a shortcoming, it also meant that the implementation could be (and was) radically changed without affecting any user code.

Minimal systems were configured with only 4 KB of RAM, but were upgradable to 32 KB for a hefty premium. The 32 KB RAM limit came about because the internal address registers were 16 bits wide but were nibble addresses, not byte addresses. The BASIC interpreter was in ROM, and different model CPUs have different feature sets included or not. Having BASIC in ROM had some tradeoffs; on the positive side, booting up was instantaneous and it was hard for an errant program to bomb the machine. On the negative side, it was very difficult and expensive for Wang to distribute bug fixes to the BASIC interpreter, so bugs tended not to get fixed.

The 2200 A/B/C series CPUs were identical other than the amount of microcode they contained. The A model had a minimal BASIC, the B model added some more commands and functions, and the C model added a few more commands and functions. The CPU, memory, and I/O cards were spread out on a backplane encased in a sturdy metal box, sometimes likened to a suitcase. Different model variations existed with different numbers of I/O expansion slots. A separate box containing a linear power supply provided the power for the CPU box. The master oscillator ran at 10 MHz and most microinstructions took 16 cycles to complete. RAM was implemented with the very first generation DRAM chips, and microcode ROM was an array of mask programmed chips. It was possible to patch microcode in the field with the addition of a "superpatch" board, basically a small diode array address decoder that could replace a small number of microinstructions.

Due to improvements in TTL density (and probably partially as the result of obsolescence of certain chips) the memory and some of the CPU logic boards were redesigned for the 2200 S/T CPU. The S CPU and T CPU flavors were simply a matter of microcode. The external power supply of the A/B/C models was done away with and an internal linear power supply was used instead. The I/O bus was identical with the A/B/C models. The -T version contained all the possible microcode options and consisted of 20K words of 20b each plus a small "constant" ROM, which totaled 42.5 KB of microcode. Compare that to the 12 KB BASIC in ROM of the TRS-80 Model III that came a few years later.

The final version of the first generation microarchitecture was the E/F CPU. This was a complete repackaging of the 2200 system to make it fit into the housing of a terminal, and was called the PCS (Personal Computer System). Not only was the CPU and memory redesigned, but a number of the I/O controllers too (the I/O controllers from the first generation were not physically compatible with the E/F CPU). The only thing that made this at all possible was that the density of memory and TTL complexity had gotten even higher. The 7055 board was the 2200F backplane and the 7056 board was the 2200E backplane. Although it was possible to load different boards into the backplanes to achieve different configurations, the standard configuration was as follows.

• 2200E
  • 7051 CPU board
  • 7052 control/data memory board
  • 7053 cassette interface board
  • 7058 CRT/Printer/Plotter I/O board
  • spare I/O slot
• 2200F
  • 7051 CPU board
  • 7052 control/data memory board
  • 7054 64x16 CRT/Floppy/Printer I/O board
  • spare I/O slot

As an indication of the volume of 2200's that Wang shipped, it took from April, 1973 until October 1976 (3.25 years) to produce 10,000 2200 CPUs⁵. That works out to about 12 machines per work day. It made Wang a lot of money, but the volume is certainly low by today's standards.

Trivia: the microcode was mostly written on punched cards that got assembled via an IBM-360 system.⁷

Second Generation 2200 (A.K.A 2600) CPU

CPU Model	Introduction	Comments
2200 VP	September,19765	New microarchitecture; BASIC-2
2200 MVP	March, 19786	Small circuit change; more microcode; new I/O controllers
Micro VP	198x?	VLSI implementation of CPU and control logic

The same design team that produced the first generation 2200 also produced the 2nd generation, internally known as the 2600 CPU. The 2600 CPU was a complete redesign, incorporating the latest technology and a much more efficient microarchitecture. Wang BASIC also got a major overhaul with many new features and was dubbed BASIC-2. Despite the complete rewrite and all the new features, BASIC-2 was 99% upwardly compatible with the original Wang BASIC. A BASIC program running on a 2600 CPU was roughly 10x faster than the exact same program running on a 2200T CPU; a factor of 2.5 of that was due to the faster cycle time of the machine, and the other factor of four came from the more powerful microarchitecture instruction set combined with more efficient algorithms. For instance, the square root operation was 25x faster (and more accurate) and the RND operation was 88 times faster (and more random) than that found on the 2200T⁷.

One great improvement in the 2600 CPU was that the microcode was no longer stored in ROMs -- it was downloaded from disk on start up, making it much easier to fix bugs in the field. Interestingly, COBOL was developed for the VP CPU and it got as far as running and brochures were sent out, but it never shipped, presumably because Wang decided that that class of customers should instead buy a 2200VS system. BASIC-3 was also announced, but it never shipped. Perhaps part of the problem was the fact that the 32 Kword control store used by the entire VP family wasn't large enough for COBOL and BASIC-3, necessitating a massive field upgrade to a 64 Kword control store.

Although the CPU microarchitecture was entirely incompatible, the I/O structure was kept from the first generation 2200, allowing people to upgrade to the VP without having to throw away all of the their I/O cards and peripherals.

The MVP had the same CPU as the VP and used the same I/O bus. The difference was that the MVP had added a single 30 millisecond one shot timer that the microcode could use to timeslice between different memory partitions, allowing one CPU to service multiple users. Support for cassette I/O was dropped, and rather than having a dedicated CRT and keyboard controller, in their place a multiplexed serial link was used to communicate to the satellite users. Some unused bits of a register were used to provide bank selection to allow supporting a larger RAM (although the per-user maximum was still capped at 56 KB less overhead).

By the early 1980s, Wang was able to reduce the CPU and control logic to a single VLSI chip. This chip interfaced to 32 Kword control RAM (microcode) and a bank of DRAM. Early versions came with 128 KB of DRAM, but later upgrades allowed up to 8 MB of DRAM. (ref: Wang 741-0584-A).

Various versions of the VP and MVP were produced, such as the SVP and LVP, but I believe they were simply packaging changes. VLSI version of the CPU. Clock rates. Internal hard disk. >64 KB RAM.

Trivia: Bruce Patterson and Dave Angel were tired of having to submit punch card decks to the IBM 360 to get their microcode assembled. Instead, for the 2600 project they wrote the microcode development tools (editor, assembler, crossref, disassembler, debugger, firmware simulator) to run on a 32 KB 2200T CPU.⁷

Trivia: The 2200VP was introduced at WESCON in September, 1976. The 6502 was also introduced at that show. This goes to show that although Wang was well aware of microprocessors (they used the 8080 in the terminal multiplexer and in their word processing family), they weren't performance competitive with large boxes full of TTL chips (yet).

Trivia: Wang developed BASIC-3 and COBOL to run on enhanced MVP systems. The enhancement was to max out the control store to 64 Kwords, making it large enough to hold these systems. It isn't clear if they were co-resident. Things went so far as to have training for FAEs to teach them how to upgrade the systems in preparation for the new languages. Then, for whatever reason, Wang decided to release neither BASIC-3 nor COBOL.

Third Generation 2200 CPU

CPU Model	Introduction	Comments
2200 CS/386	July 19898	Emulation using an 80386 CPU

The 2200 line languished for quite a while with minor improvements along the way. There were enough 2200 systems out in the field that Wang couldn't simply ignore the market, but the development focus was on the VS family. As the installed base of 2200 customers got smaller, the expense of developing new 2200 CPUs couldn't be justified.

Wang took a different approach this time around. The BASIC-2 interpreter was reimplemented to run on an Intel 80386 CPU. A card containing a 386, 256KB of SRAM, 1 to 8 MB of DRAM, and the necessary interface logic was designed. The card plugged into a standard VP-style chassis, replacing any existing CPU and memory cards, but leaving the rest of the system unchanged. This card supported all of the MVP functionality at higher throughput at a better cost profile, and was called the 2200 CS/386. It was introduced by July, 1989.

The CS/386 BASIC-2 interpreter doesn't run on DOS or Windows; instead, just like the VP family, BASIC-2 on the CS/386 is a closed environment. The CS/386 manuals describe the system software has having an incremental compiler. Previous Wang BASIC implementations used simple interpreters; an incremental compiler is a half-way stop between an interpreter and a full compiler. Such a scheme is more complex than a simple interpreter, but has the advantage of being faster. One down side of this is that programs occupy 80% ⁸ more memory since the original source code and the compiled version are resident in memory at the same time.

The 256KB of fast zero wait-state SRAM was used to hold the BASIC-2 incremental compiler, while the DRAM held the user applications and data. This was a good trade-off since the vast majority of accesses would be to the SRAM.

The first version ran on a 16 MHz 386. In March of 1991, Wang announced a follow-up product called the CS/386 Turbo, consisting of a 32 MHz 386 CPU and up to 32 MB of DRAM, offering twice the performance.

Although it supported the same syntax as the MVP BASIC-2 implementation, the CS/386 version of BASIC-2 didn't always product the exact same answers. For instance, PRINT RND(0),RND(1) would produce the first same number but a different second number. Another example is SELECT D:PRINT ARCSIN(ARCCOS(ARCTAN(TAN(COS(SIN(9)))))). The two implementations give similar but not identical answers. Even the parser is somewhat different. If the user entered 10 DATA 1,2,3,      4,5,6, the MVP BASIC-2 interpreter, like all earlier Wang BASIC interpreters, would preserve the extra spaces. The CS/386 BASIC-2 interpreter would strip the extra spaces.

Computer Systems

The previous section detailed the various types of 2200 CPUs that Wang made and what distinguished them. Wang had a wide variety of peripherals that were used across many CPU types. Wang sold various bundles of CPUs with peripherals as system packages with many configuration options. Wang also encouraged customers to upgrade to higher end systems, made possible by the very good hardware interchangeability and excellent software compatibility between the different systems. This flexibility lead to a blurring of where one configuration ended and where the next began. Still, this section will attempt to give a quick overview of common configurations.

2200 A/B/C/S/T

Early on (starting in the spring of 1973), Wang sold a customer a CPU with a given microcode option, a terminal, some type of storage system (cassette or disk, typically), a printer, and whatever specialized I/O card was necessary. There was no obvious attempt to establish a bundle identity. In the picture above, note that the A/B/C models have the external power supply (the box in front), while the S and T have integrated power supplies.

2200 WCS/10, WCS/15, WCS/20, WCS/30

In June of 1975⁴, Wang started bundling 2200T CPUs with sets of peripherals. These bundles used existing Wang products with no new technology, but the packages made it easier for the customer to identify what set of options made sense to go together. The product line staked out three tiers of customer:

• Low-end: WCS/10 is 2200T CPU, tape storage, 64x16 terminal. Starting at $6100.
• Mid-range: WCS/20 is 2200T CPU, one floppy, 80x24 terminal. Starting at $11,200.
• High-end: WCS/30 is 2200T CPU, one floppy, 80x24 terminal, 5M fixed/5M remove hard disk. Starting at $25,700.

The WCS/10 configuration wasn't very common. The /20 and /30 options were very common and a lot more useful since they contained disk systems. Systems also came with very heavy desks that were custom made to hold the CPU and the various peripherals.

In September 1977, at Wescon, Wang introduce the WCS/15 model. Wang's announcement said it was positioned between the Wang PCS-II (low end) and the WCS/20 (high end). The standard WCS/15 configuration was with 16 KB of RAM, a 12-inch CRT, one disk drive, contained in a desk-styled piece of furniture.

2200 PCS

January, 1976, saw the introduction of the Wang PCS computer. PCS stood for Personal Computer System. Although it looked very much like the standard Wang 2220 and 2226 terminals, the CPU and some common peripheral controllers were repackaged to fit into the terminal housing, getting rid of the ungainly metal "suitcase." Specifically the 2200E/F CPU was used with either the 2200E (cassette option) or the 2200F (disk option) backplane to address two market segments. The PCS was aimed directly at countering the recently introduced IBM 5100 portable computer⁴. Wang's advertisements touted the feature improvements over the 5100 (such as a much larger screen), but mostly focused on the lower price: $5400 for the PCS vs. $8975 for the IBM 5100. Upgrading the PCS from 8 KB RAM to 32 KB would cost an extra $4400 (24 KB for about $14000 in 2003 dollars).

2200 WS

Simultaneously with the PCS, Wang introduced the 2200WS. This was essentially a PCS system with 8 KB RAM and no cassette and no disk storage. Instead, it contained a disk controller interface that hooked up to a WCS/30 system configured with a disk multiplexer. Up to three 2200WS machines could share the disk with the WCS/30. Prices started at $4900.

2200 PCS-II

2200 VP family

2200 VP

2200 MVP

March, 1978 saw the introduction of the MVP CPU, which was a VP CPU with a 30 ms one-shot timer to determine time slices for multitasking, plus a banked memory scheme for allowing more total memory (although the per-process memory remained the same). With the MVP, Wang introduced a terminal multiplexer and the 2236D terminal. Previous 2200's used a CRT controller that was accessed locally; the terminal multiplexer and the terminals communicated via a serial protocol, which used run-length compression so that a run of repeated characters (most typically spaces) could be sent with just two bytes. Up to 12 terminals could be connected to one CPU by using three multiplexers.

2200 SVP

2200 LVP

2200 CS-N and CS-D

In early 1987, Wang introduced the 2200 CS-N and 2200 CS-D systems. The -N suffix means the box housing the CPU does not contain storage, while the -D suffix means the box contains three storage bays. The bays could hold any combination of 5" hard drive, 5.25" floppy drive, or cassette streaming tape drive. A common configuration was one of each.

The CS-N and CS-D used the same MicroVP CPU implementation that Wang had used previously, so this product was just a repackaging of functionality. With the CS family announcement, Wang renamed BASIC-2 as Multiuser BASIC-2, Release 3.0. It offered some minor enhancements to the language, including allowing the user to enter keywords in either upper or lower case.

2200 CS/386-N and CS/386-D

In mid 1989, Wang introduced two new systems, the CS/386-N and the CS/386-D. These were the same systems as the CS-N and CS-D, except the MicroVP CPU was replaced with the 386 card that Wang had just developed. Accordng to Gene Shulz, the 2200 Product Manager at the time, the CPU was designed by Wang's Taiwan R&D office, but debugging was done at Lowell, Mass.

The CS-N and CS-D used the same MicroVP CPU implementation that Wang had used previously, so this product was just a repackaging of functionality. The CS/386-N and CS/386-D versions were identical, but rather than using the MicroVP, it used the 386-based CPU.

To confuse matters further, any VP-based system could be upgraded by swapping out the old CPU and plugging in the CS/386 card.

A 2200 CS can be seen in Jan van de Veen's Small Wang Museum. Even though it was produced so much later, it used the same heavy sheet metal construction and I/O slots used by the Wang 2200 CPUs of 15 to 20 years earlier¹⁰.

Game Over

In 1992, Wang entered bankruptcy, which lasted a couple years. All sales and marketing of the 2200 family ended immediately, although support continued on. InterACTION 97, in Boston, was the last Wang conference ever held, and at that time, there were more than 200 2200 systems still under maintenance.¹²

Finally, in 1999, Wang was acquired by Getronics.

The 2200 family spanned about 20 years. A decade later, there are still customers in the field using their 2200 systems for production work.

Postscript

Apparently, around 1996 a gentleman named Marc DeGagne, a former Wang employee, acquired rights to some of Wang's IP, and started a company in Quebec, Canada, called Fasstcom Computers. Faastcom sold hardware and software similar to the CS/386, that is, a reimplementation of BASIC-2 running on a conventional 32b microprocessor. Fasstcom enhanced the software and called their operating system "FICE". Apparently the Fasstcom hardware could support up to 255 users simultaneously. Fasstcom continued selling hardware and software up until about 2002.¹³

And, of course, there are the enhanced BASIC-2 dialects: KCML by Kerridge and NCL by Niakwa. These products started long ago and are still being sold today. They are BASIC compilers, and for the most part retain backwards compatibility for most BASIC-2 code, although it probably isn't apparent from looking at modern code supported by these products, which is light-years ahead of the now restrictive BASIC-2 syntax.

Footnotes

Here are a few footnotes describing where I got my "facts" from. This is hardly definitive since when a product is announced and when it is actually shipped can be very different dates.

1. Riding the Runaway Horse, Charles C. Kenney, p. 58

2. Wang Product Guide 700-0787C System 2200 dated 9/74 only mentions the 2200A/B, but Wang Data Sheet 700-3491 2200 A B C CPU dated 11/74 obviously mentions the new C CPU.

3. Wang Data Sheet 700-3493A 2200S/2220 BASIC PROCESSING SYSTEM dated 1/75

4. Wang Printout newsletter; Vol V, No. 3 (undated, but probably 1/76)

5. Wang Printout newsletter; Vol VI, No. 1 dated 10/76. WESCON was held in September that year.

6. Wang Printout newsletter; Vol VIII, No. 1 dated 3/78

7. Dave Angel, private communication

8. Wang Data Sheet 715-2363A CS/386 Data Sheet

9. Wang sales brochure 700-3959A PCS-II dated 6/77

10. Georg Schäfer, private communication, 4/2005

11. Mike Hurford, private communication, 4/2005. LVP image by Mike Hurford.

12. Thomas Junker, private communication, 2/2006.

13. Mark Pickersgill, private communication, 9/2006.